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| Semiconductor Industry Association |
Moore’s observation about memory density doubling every one and a half years or so was in retrospect somewhat obvious. Nonetheless, it laid the foundation for futurists and forecasters to predict technological miracles that are still forthcoming. I remember Jensen Huang saying in the early days of Nvidia, “Moore’s Law is our friend.” He was right then, and now. But, it isn’t a law, it was, and is an economical observation. As such it has two vectors, one of economics as stated, and one of technology development. The technology development has a complimentary vector, price-performance. What we have seen in the last few years is the price-performance has fallen off, maybe hit its asymptote. That has caused some people to declare that Moore’s law dead. It is far from dead, but it does not have the same price-performance ratio it used to.
I took a look at the leading companies' path along the bespoke Moore’s law curve and they follow it pretty closely. I was surprised the companies exchanged first place (to use a new node) over the past twenty year—there is no clear leader regardless of fab ownership.
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| The nanometer chase |
As the process or feature size shrank the number of transistors used in a chip went up. Nvidia currently holds the record for the biggest densest processor with its 2017, 21.1 billion, 12 nm transistor GV100 in an 855 mm2 die.
Nvidia’s GV100 and Intel’s 8 billion, 14 nm 683 mm2 Xeon are monolithic devices, and possibly the last ones, or best case next to last one. The yield and costs associated with super big super dense chips combined with the price-performance ratio of state of the art chips make the move to chiplets packaged in a single package with an internal fabric and substrate, a more practical approach. AMD was the first to do it, although Intel has in the past made multi-chip devices but with different processors and coupling than AMD’s Epyc and Ryzen chips.
Increasing the yield by using smaller die could offset the flattening of Moore’s law. And as you probably know, Samsung and TSMC are already making 5 nm test chips, and 3 nm are in simulation. In late 2018, TSMC chairman Mark Liu predicted chip scaling would continue to 2 nm nodes, and in December 2019, Intel announced plans for 1.4 nm production in 2029. Does that sound like Moore’s law is dead?
No one has ever seen one
No one has ever seen a nanometer. For comparative purposes, Coronavirus particles are 80 to 120 nm in diameter, about the feature size of a 2004 semiconductor. Light microscopes are limited by diffraction to about 200 nm resolution. A Scanning probe microscope (SPM) can resolve down to 10 nm. Sub 10 nm is a mysterious and unknown world where angels and devils play.
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| Transmission electron microscope image of a cross-section of the transistor. It shows the 1-nm carbon nanotube gate and the molybdenum disulfide semiconductor separated by zirconium dioxide, an insulator. (Source: Qingxiao Wang/UT Dallas) |